1. Technical Field
The present invention is directed to a power system and more particularly to a method and apparatus for controlling a synchronous rectifier power converter.
2. Description of Related Art
In order to meet the ever-increasing demand for high speed and miniaturization of digital devices, microelectronic circuit voltage levels have been dropping. No longer are 5 V and 12 V power supplies dominant, but rather 3.3 V, 2.5 V, 1.8 V, and 1.5 V and others are becoming increasingly common as the standard voltages in many electronic devices. Traditional 5V and 12V power supplies typically use diodes to rectify secondary AC voltage to a DC voltage. These supplies allow the output current on the secondary side to xe2x80x9cfreewheelxe2x80x9d during the time that the power switches on the primary side are off. However, as output voltage decreases, the power loss incurred in the rectifier diodes becomes very large compared to the output power. For example, using 0.5 V Schottky diodes in a 1V output power supply results in a power loss of approximately 33% of the output power in the rectifier circuits alone.
Further, high-power density is crucial in applications where the space for the power supply relative to the power output is limited. Thus, there is an ongoing quest to develop power supplies with increased density. Limiting a power supply to a small area requires that the power supply be efficient because the heat transfer capability decreases as the overall size of the power supply decreases. To achieve higher efficiency, synchronous rectifiers are increasingly used in low output voltage DC to DC converters. One with skill in the art understands that the use of a synchronous rectifier field effect transistor (xe2x80x9cFETxe2x80x9d) greatly improves the DC to DC conversion efficiency. The advantage of the synchronous rectifier FET is the very low xe2x80x9con resistancexe2x80x9d of current FETs which can be even further reduced by paralleling multiple devices.
Although synchronous rectifiers are much more efficient than diode rectifiers at today""s lower voltage levels, they are not without their drawbacks. One of the major problems is caused by the bi-directional nature of current flow in a synchronous rectifier. During startup, light-load, or shutdown conditions, for example, a significant reverse power flow may occur when several power modules using synchronous rectifiers are connected in parallel for highly reliable microelectronic systems or when a pre-bias voltage is applied to the output of the power supply. This phenomenon, which is well known in the art, can bring down the output bus voltage, thus causing malfunction or shutdown to downstream voltage-sensitive electronic devices.
For DC to DC converters using synchronous rectifiers that are connected in a parallel configuration, the bi-directional power flow characteristics can result in a very undesirable operating condition in which one converter drives the output of the other converter. When one or more converters are operating in this reverse power processing mode, the overall power system can be circulating a significant amount of current while actually delivering very little current to the converter output load. This results in an undesirably high power dissipation within the converters even under light-load or no load conditions.
Because of this effect, turn-on and startup transients have become major concerns in systems where two or more DC to DC converters employing synchronous rectifier FETs are connected in parallel without any or-ing diodes. If proper control of the synchronous rectifiers is not used in such a system, one of the converters may behave as a load, sinking current from the other converter, even under a no load condition. Such a system is inefficient and may result in abnormal startup of the system. The system transient response could also be detrimentally affected during the converter""s transition from the reverse power processing mode to a forward processing mode.
In response to this problem, several solutions have been proposed. Eng (U.S. Pat. No. 6,101,104) proposes a control method and apparatus that senses the voltage across the synchronous rectifier, and turns the synchronous rectifier off when the voltage across the rectifier is about to change polarity. Ideally the synchronous rectifier is turned off at the approximate instant that the voltage across the rectifier reaches approximately zero. Thus, current flow in the reverse direction is avoided in the synchronous rectifier FET. Brkovic (U.S. Pat. No. 5,940,287) proposes a transient response network including a synchronous rectifier controller that senses the state of the power switch and then disables the synchronous rectifier device when the power switch has remained in a non-conducting state for a specified period of time. Boylan and Rozman (U.S. Pat. Nos. 6,038,154 and 6,191,964 B1) have proposed a control circuit for operating a synchronous rectifier in both a bi-directional mode and a uni-directional mode of operation as a function of characteristics of the power system employing the synchronous rectifiers. Based on the characteristic sensed, the control circuitry switches between the bi-directional and uni-directional mode of operation by enabling or disabling the synchronous rectifier FET. In the bi-directional mode, the control circuitry switches the synchronous rectifier FETs to rectify the substantially alternating current as well as the free-wheeling current. Bi-directional current flow is possible in this mode of operation. In the uni-directional mode, the synchronous rectifier FETs are disabled to act as a conventional diode rectifier (due to the intrinsic body diode of the FET), allowing only uni-directional current and thereby preventing reverse power flow because the diode only conducts in one direction.
Referring now to FIG. 1, a schematic diagram of a prior art clamped-mode forward converter circuit 100 with a synchronous rectifier circuit 130 is illustrated. This circuit is described in more detail in U.S. Pat. No. 6,191,964 B1 to Boylan et al., issued Feb. 20, 2001, entitled xe2x80x9cCircuit and Method for Controlling a Synchronous Rectifier Converter,xe2x80x9d and incorporated herein by reference as if fully set forth at length. The clamped-mode forward converter circuit 100 and its advantages are discussed in U.S. Pat. No. 5,303,138 to Rozman, issued on Apr. 12, 1994, entitled xe2x80x9cLow Loss Synchronous Rectifier for Application to Clamped-Mode Power Converters,xe2x80x9d and incorporated herein by reference as if fully set forth at length.
The clamped-mode forward converter circuit 100 comprises a voltage input VIN connected to a primary winding 110 of a power transformer by a power switch (e.g., MOSFET) Q1. The power switch Q1 is shunted by series connection of a clamp capacitor Cclamp and a power switch Q2. The conducting intervals of the power switch Q1 and the power switch Q2 are mutually exclusive. The duty cycle of the power switch Q1 is D and the duty cycle of the power switch Q2 is 1-D.
A secondary winding 135 of the power transformer is connected to an output filter capacitor Cout through an output filter inductor Lout and the synchronous rectifier circuit 130, providing a substantially alternating current input to the synchronous rectifier 130. The synchronous rectifier circuit 130 comprises control circuitry 150 and switching circuitry. A rectifying synchronous rectifier device SR1 and a freewheeling synchronous rectifier device SR2 comprise the switching circuitry. The switching circuitry may be realized with any suitable rectifier devices, although a low RDS(on) n-channel MOSFET is suitable for such applications. A diode D1 and a diode D2 are discrete devices placed in parallel with the synchronous rectifier devices SR1, SR2, respectively. However, the diodes D1, D2 may represent an intrinsic body diode of a n-channel MOSFET.
A current sensing device 165 encompasses either a current shunt connected in series with the output, or a Hall effect current sense device in series with the output. The sensed current signal is then provided to a parallel control circuitry 170 to facilitate forced load sharing.
The current signal is also provided to a level detector 175 which compares the load current to some predetermined reference level. When the converter is operating below some fraction of full rated load current, perhaps 5% or 10%, the detector 175 will disable the synchronous rectifier drive circuit 130. This action reconfigures the converter from a synchronous rectifier circuit to a conventional diode rectifier circuit. Because a diode rectifier circuit cannot process power in the reverse direction, the proposed circuit effectively prevents reverse power flow. When the converter output current increases beyond the 5% or 10% trip level (some hysteresis is probably preferred to prevent mode switching oscillation), the synchronous rectifier drive circuit 130 is enabled, resuming normal operation. Thus, the control circuit 150 transitions the switching circuitry SR1, SR2 from the bi-directional mode to the uni-directional mode when the output current level drops below a predetermined threshold level.
The remaining circuitry in FIG. 1 is standard for synchronous rectifier circuits configured for parallel operation. A voltage regulator 180 monitors the load and maintains the output voltage Vout within tolerance limits despite changes in both the load and the input voltage Vin. A pulse-width modulation (xe2x80x9cPWMxe2x80x9d) circuit 185 is included to keep the output voltage Vout of the converter constant over the various operating conditions. Finally, the circuits are coupled as illustrated by the interconnecting lines and arrows, and the synchronous rectifier control circuitry 150 and the PWM circuit 185 are coupled to the clamped-mode circuit 100.
Note that the circuit in FIG. 1 retains the efficiency benefits of synchronous rectification at higher loads, but does not retain the benefit of synchronous rectifiers in light-load or startup conditions. Reconfiguring the circuit to diode rectification at light-loads prevents reverse power flow, but results in higher power losses if the integral body diodes of SR1 and SR2 are used as diodes D1 and D2, respectively. Although discrete devices can be used as diodes D1 and D2 to prevent the current and thermal stress, as stated before, the use of discrete diodes decreases the power density of the power supply, thus requiring more area for the circuit and increasing the cost of the circuit.
Referring now to FIG. 2, a schematic diagram of a prior art non-isolated buck converter (xe2x80x9cbuck converterxe2x80x9d) 200 with a synchronous rectifier circuit 210 is illustrated. The buck converter 200 includes a power switch Q1, output filter capacitor Co, filter inductor Lo, resistive load Ro, voltage regulator 250, and a pulse-width modulator (xe2x80x9cPWMxe2x80x9d) circuit 270. The synchronous rectifier circuit 210 includes control circuitry 220 and switching circuitry. A switch (e.g., MOSFET) Q2 comprises the switching circuitry. The switching circuitry may be realized with any suitable rectifier devices including a low RDS(on) n-channel MOSFET with an integral body diode of the n-channel MOSFET. The switch Q2 is capable of carrying bi-directional current and the buck converter 200 is susceptible to bi-directional power flow. To prevent the bi-directional power flow, the switch Q2 may be disabled through the control circuitry 220 coupled to a sensing device 230. Analogous to the rectifier circuit of FIG. 1, the rectifier transitions from the bi-directional mode to the uni-directional mode of operation by disabling switch Q2 (analogous to disabling synchronous rectifier device SR1 in FIG. 1). The bi-directional power flow is prevented in the buck converter 200 by replacing the switch Q2 with a diode or by disabling the switch Q2 and relying on its integral body diode.
One of the problems with the prior art solutions is that disabling the synchronous rectifier forces the output inductor current to continue to flow through the synchronous rectifier FET body diode. This creates extra power dissipation in the synchronous rectifier FET devices and causes undesired power and thermal stress. Modem low-voltage synchronous rectifier FETs have a relatively lossy body diode. As a result, the use of the above-proposed solutions may require additional low voltage drop Schottky rectifier diodes to be added in addition to the lossy body diode. This is an undesirable solution in most cases because the power supply density is decreased and the cost of the power supply is increased.
Therefore a power supply is needed in which a new or improved control method or circuit for operating the power converter is used. The control circuit should allow multiple DC to DC converter systems using synchronous rectifiers connected in a parallel configuration to operate in an efficient manner regardless of the state of the system. The control system should avoid undesired reverse current and thermal stresses on the synchronous rectifier FETs that are caused when these devices are disabled. The system should continue to prevent substantial reverse current power flow either during light-load or no load operating conditions or during startup or shutdown conditions.
The present invention is a control scheme for a synchronous rectifier converter that prevents substantial reverse current flow in all modes of operation without disabling the synchronous rectifiers. Rather than disable the synchronous rectifier altogether to stop the flow of reverse current in light-load, startup, or shutdown conditions, the secondary synchronous rectifier is always enabled, operating either in the fully-synchronous mode or the partially-synchronous mode. The transition between the two operating modes is determined by sensing a system parameter. For example, this parameter can be based on the amount of reverse current that would disrupt the bus to which the converter output is connected, or it could be based on the heat created by the reverse current flow in the power converter when heat dissipation is a concern. In the partially-synchronous mode, a duty cycle of the synchronous rectifier switch is modified to turn off the synchronous rectifier before the output current goes negative. The control scheme of the present invention effectively limits substantial reverse current flow while also improving efficiency by eliminating the need for discrete diodes, yet retaining the benefit of synchronous rectification throughout the operating range of the converter.